Espressif Systems /ESP32-C6 /RMT /CH1_TX_STATUS

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Interpret as CH1_TX_STATUS

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0MEM_RADDR_EX0STATE0APB_MEM_WADDR0 (APB_MEM_RD_ERR)APB_MEM_RD_ERR 0 (MEM_EMPTY)MEM_EMPTY 0 (APB_MEM_WR_ERR)APB_MEM_WR_ERR 0APB_MEM_RADDR

Description

Channel 1 status register

Fields

MEM_RADDR_EX

This register records the memory address offset when transmitter of CHANNEL%s is using the RAM.

STATE

This register records the FSM status of CHANNEL%s.

APB_MEM_WADDR

This register records the memory address offset when writes RAM over APB bus.

APB_MEM_RD_ERR

This status bit will be set if the offset address out of memory size when reading via APB bus.

MEM_EMPTY

This status bit will be set when the data to be set is more than memory size and the wraparound mode is disabled.

APB_MEM_WR_ERR

This status bit will be set if the offset address out of memory size when writes via APB bus.

APB_MEM_RADDR

This register records the memory address offset when reading RAM over APB bus.

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